Abstract

International audience; To ensure the code integrity in secure embedded processors, most previous works focus on detecting attacks without paying their attention to recovery. This paper proposes a novel hardware recovery approach allowing the processor to resume the execution after detecting an attack. The experimental results demonstrate that our scheme introduces a very low impact on the performance while requiring a reasonable hardware overhead.


Original document

The different versions of the original document can be found in:

http://dx.doi.org/10.1109/hst.2011.5955004
http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000005955004,
https://ieeexplore.ieee.org/document/5955004,
https://dblp.uni-trier.de/db/conf/host/host2011.html#HuuRAD11,
https://hal.archives-ouvertes.fr/emse-00620758,
https://academic.microsoft.com/#/detail/2104971439
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Published on 01/01/2011

Volume 2011, 2011
DOI: 10.1109/hst.2011.5955004
Licence: CC BY-NC-SA license

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