Abstract

Modern architecture research relies heavily on detailed pipeline simulation. Simulating the full execution of an industry standard benchmark can take weeks to months to complete. To overcome this problem researchers choose a very small portion of a program's execution to evaluate their results, rather than simulating the entire program. In this paper we propose Basic Block Distribution Analysis as an automated approach for finding these small portions of the program to simulate that are representative of the entire program's execution. This approach is based upon using profiles of a program's code structure (basic blocks) to uniquely identify different phases of execution in the program. We show that the periodicity of the basic block frequency profile reflects the periodicity of detailed simulation across several different architectural metrics (e.g., IPC, branch miss rate, cache miss rate, value misprediction, address misprediction, and reorder buffer occupancy). Since basic block frequencies can be collected using very fast profiling tools, our approach provides a practical technique for finding the periodicity and simulation points in applications.


Original document

The different versions of the original document can be found in:

https://dl.acm.org/citation.cfm?id=674158,
https://dblp.uni-trier.de/db/conf/IEEEpact/IEEEpact2001.html#SherwoodPC01,
https://ieeexplore.ieee.org/document/953283,
https://www.cs.ucsb.edu/~sherwood/pubs/PACT-bbda.pdf,
http://www.cs.ucsb.edu/~sherwood/pubs/PACT-bbda.pdf,
http://www.cs.ucsb.edu/~sherwood/slides/BBDA-pact2001.pdf,
https://www.engineering.ucsb.edu/~sherwood/slides/BBDA-pact2001.pdf,
https://academic.microsoft.com/#/detail/2107493680
http://dx.doi.org/10.1109/pact.2001.953283
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Published on 01/01/2002

Volume 2002, 2002
DOI: 10.1109/pact.2001.953283
Licence: CC BY-NC-SA license

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