Abstract

International audience; CMOS technology trends at one side open up some opportunities like making small and power efficient devices available, which in turn allow to put more functionality into a single chip. However, on the other side it poses some challenges like making devices vulnerable to hard and soft errors. In this paper we propose an efficient fault-tolerant architecture able to deal with permanent and transient faults in combinational parts of pipeline structures. The principle consists in triplicating the combinational logic parts but, unlike TMR, only two copies are running in parallel while the third one remains in standby until an error is detected. We implement this approach on a MIPS microprocessor as case study to make it resilient against transient and permanent faults.

Abstract

International audience; Increasing vulnerability of transistors and interconnects due to CMOS technology scaling is continuously challenging the reliability of future electronic circuits and systems. Lifetime reliability is gaining attention over performance as a design factor even for lower-end commodity applications. In this paper we propose an effective hybrid fault-tolerant architecture able to deal with permanent and transient faults in combinational parts of pipelined cores. The principle consists in triplicating the combinational logic parts but, unlike TMR, only two copies run in parallel while the third one remains in standby until an error is detected. We have implemented this approach on a MIPS microprocessor as case study. Experiments show that our approach is comparable to TMR in terms of area with a notable power saving and offers a full protection against transient and permanent faults.

Abstract

Pumped storage plants (PSPs) have achieved rapid development and deployment worldwide since the penetration of intermittent renewable energy sources (RES). Hydraulic transient analysis in the PSP, to obtain the control parameters such as extreme water hammer pressure, is vital to the safe design of water conveyance system. Empirically, simultaneous load rejection (SLR) is commonly accepted as the control condition for extreme water hammer, while it is not completely true for the PSP. Employing theoretical analysis and numerical simulation, this study systematically investigates the effects of geometric characteristics on the extreme water hammer, and reveals the mechanism leading to the maximum spiral case pressure (SCP) during a two-stage load rejection (TLR) process. The results indicate that the extreme water hammer pressure is closely related to geometric characteristics of the water conveyance system, performing the allocation of the water inertia time constant of the main and branch pipelines. When the water inertia time constant in the branch pipe is dominant (&eta 1 > 0.24 for example), the maximum SCP will occur in TLR conditions rather than SLR. Moreover, the maximum SCP is almost the same, providing the water inertia time constants of both the main and branch pipelines are kept constant. Document type: Article