Abstract

International audience; In the latest few years, lot of efforts have been done to pave the way to sustainable mobility, in order to solve pollution problems and fuel shortage. The use of electric vehicles (EV) is considered as one of the best ecologic and economic solution. However, autonomy barriers and limitations slow the progress and the deployment of this technology. In this paper, we propose an advanced electric vehicles' fleet management architecture. This architecture considers the most important factors that can affect the traveling mode of electric vehicles, in order to offer different services to fleet management companies for an efficient monitoring and management of their fleets. One of the most important service, considered in this paper, consists on providing economic itineraries planning for electric vehicles. Best routes, in term of electric power consumption, are computed based on the collected information about road topology (elevation variations, source, destination, etc.), weather conditions, vehicle characteristics, driver profile, traffic conditions and electric charging stations positions. In case of battery drop, new routes passing through the nearest available charging stations are recalculated and provided to the driver. To prove the concept, we implemented a lightweight traffic management server that provides this itinerary planning service to an EV fleet company. The server provides a web application to book an EV and plan the trip. All possible itineraries are displayed on a map with electric power consumption, traveled distance and duration details. Then, the server uploads the chosen itinerary into the vehicle's GPS or into the driver's smartphone.

Abstract

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. Advanced Driver Assistance Systems (ADAS) and Autonomous Driving (AD) have drastically increased the performance demands of automotive systems. Suitable highperformance platforms building upon Graphic Processing Units (GPUs) have been developed to respond to this demand, being NVIDIA Jetson TX2 a relevant representative. However, whether high-performance GPU configurations are appropriate for automotive setups remains as an open question. This paper aims at providing light on this question by modelling an automotive GPU (Jetson TX2), analyzing its microarchitectural parameters against relevant benchmarks, and identifying specific configurations able to meaningfully increase performance within similar cost envelopes, or to decrease costs preserving original performance levels. Overall, our analysis opens the door to the optimization of automotive GPUs for further system efficiency. Peer Reviewed

Abstract

In this paper we study regenerator placement and traffic engineering of restorable paths in Generalized Multipro-tocol Label Switching (GMPLS) networks. Regenerators are necessary in optical networks due to transmission impairments. We study a network architecture where there are regenerators at selected nodes and we propose two heuristic algorithms for the regenerator placement problem. Performances of these algorithms in terms of required number of regenerators and computational complexity are evaluated. In this network architecture with sparse regeneration, offline computation of working and restoration paths is studied with bandwidth reservation and path rerouting as the restoration scheme. We study two approaches for selecting working and restoration paths from a set of candidate paths and formulate each method as an Integer Linear Programming (ILP) prob-lem. Traffic uncertainty model is developed in order to compare these methods based on their robustness with respect to changing traffic patterns. Traffic engineering methods are compared based on number of additional demands due to traffic uncertainty that can be carried. Regenerator placement algorithms are also evaluated from a traffic engineering point of view.© (2002) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Abstract

International audience; CMOS technology trends at one side open up some opportunities like making small and power efficient devices available, which in turn allow to put more functionality into a single chip. However, on the other side it poses some challenges like making devices vulnerable to hard and soft errors. In this paper we propose an efficient fault-tolerant architecture able to deal with permanent and transient faults in combinational parts of pipeline structures. The principle consists in triplicating the combinational logic parts but, unlike TMR, only two copies are running in parallel while the third one remains in standby until an error is detected. We implement this approach on a MIPS microprocessor as case study to make it resilient against transient and permanent faults.

Abstract

Conference of 10th IEEE International Symposium on Industrial Embedded Systems, SIES 2015 ; Conference Date: 8 June 2015 Through 10 June 2015; Conference Code:116797; International audience; Many-core architectures are promising hardware to design hard real-time systems as they are based on simpler and thus more predictable processors than multi-core systems. However, the worst-case behavior of the Network-on-Chip (NoC) for both inter-core and core to external memories or peripherals communications must be established. Several NoCs targeting hard real-time systems, made of specific hardware extensions, have been designed. However, none of these extensions are currently available in commercially existing NoC-based many-core architectures, that instead rely on wormhole switching with round-robin arbitration. In this paper, we thus demonstrate three properties of such NoC-based wormhole networks to identify worst-case scenarios and reduce the pessimism when modeling flows in contentions. We then describe and evaluate an algorithm to compute Worst-Case Traversal Time (WCTT) of flows that uses these properties. In particular, our results show that the pessimism can be reduced up to 50% compared to current state-of-the-art real-time packet schedulability analysis.

Abstract

Heterogeneous multicore systems have gained momentum, specially for embedded applications, thanks to the performance and energy consumption trade-offs provided by inorder and out-of-order cores. Micro-architectural simulation models the behavior of pipeline structures and caches with configurable parameters. This level of abstraction is well known for being flexible enough to quickly evaluate the performance of new hardware implementations, such as future heterogeneous multicore platforms. However, currently, there is no open-source micro-architectural simulator supporting both in-order and out-of-order ARM cores. This article describes the implementation and accuracy evaluation of a micro-architectural simulator of Cortex-A cores, supporting in-order and out-of-order pipelines and based on the open-source gem5 simulator. We explain how to simulate CortexA8 and Cortex-A9 cores in gem5, and compare the execution time of ten benchmarks with real hardware. Both models, with average absolute errors of only 7 %, are more accurate than similar microarchitectural simulators, which show average absolute errors greater than 15 %.

Abstract

International audience; High volumes of pedestrians, cyclists and other vulnerable road users (VRUs) have much higher casualty rates per mile; not surprising given their lack of protection from an accident. In order to alleviate the problem, sensing capabilities of smartphones can be used to detect, warn and safeguard these road users. In this research we propose an infrastructure-less fog-based architecture named PV-Alert (Pedestrian-Vehicle Alert) where fog nodes process delay sensitive data obtained from smartphones for alerting pedestrians and drivers before sending the data to the cloud for further analysis. Fog computing is considered in developing the architecture since it is an emerging paradigm that has paramount of advantages for low-latency applications which demand mobility support, geo-distribution and location awareness. We have also defined an algorithm for accident prediction and alerting traffic accidents involving vehicles and pedestrians. PV-Alert can be deployed quickly since it is based only on users' smartphones and doesn't require special infrastructure. Simulation results show that the proposed architecture is able to render alerts in real time whichever the wireless communication technology used to connect smartphones with fog nodes (Wi-Fi or LTE). Moreover, analytical and performance evaluations depict that the new architecture outperforms other related architectures in terms of reliability, scalability and latency.

Abstract

Electric vehicle battery performance near end-of-life is limited by mismatched cell degradation, leading to an estimated 5-10% cell capacity variation across the pack. Active cell balancing hardware architectures incorporating a Low-Voltage (LV) bus supply have been introduced to unlock lost capacity due to cell imbalance at reduced cost, through elimination of the vehicle's 400-to-12V dc-dc converter. In this work, a hierarchical model-predictive control scheme is applied to a time-shared isolated converter active balancing architecture that incorporates LV bus supply. The proposed controller efficiently divides computation among the battery management system hardware components. The energy-buffering capability of the lead-acid battery, which is connected to the LV bus, is used to trade-off balancing and bus regulation objectives, reducing peak power and improving the system cost-effectiveness. Simultaneous state-of-charge balancing and LV bus regulation is verified in simulation and experiment using real-world drive and LV load data collected from a GM Bolt electric vehicle. Similar controller performance compared to a central scheme is achieved in simulation. The experimental setup includes a custom 12S2P, 3.9kWh, liquid-cooled Lithium Nickel Manganese Cobalt battery module with embedded battery management system. The controller performance is evaluated with an initial maximum state-of-charge imbalance of 6.8%.

Abstract

This paper presents the architecture and framework for a policy based QoS control in a shared medium type of network such as Ethernet. QoS is achieved by a combination of traffic engineering of bandwidth pipes, priority scheduling of traffic at network nodes and controlled access to the bandwidth pipes in broadband access networks.