Abstract

Fault injection is a powerful technique for attacking digital systems. Software developers have to take into account fault effects when system security is a concern. To this end, software fault models have been developed. However, these models are often designed independently of any hardware consideration and thus raise the problem of realism. The generality of these models cannot account for the specificities of each architecture. As a consequence, software countermeasures based on such software fault models do not guarantee a good protection against faults. Processor microarchitecture should be precisely analysed to better understand faulty behaviours and design stronger software countermeasures. To illustrate this assumption, we will show in this paper some faulty behaviours that have been observed on a RISC-V processor, and their consequences on typical software countermeasures.


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The different versions of the original document can be found in:

http://dx.doi.org/10.1109/dsd.2018.00097
https://hal.archives-ouvertes.fr/hal-01899800,
https://academic.microsoft.com/#/detail/2896208500
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Published on 01/01/2018

Volume 2018, 2018
DOI: 10.1109/dsd.2018.00097
Licence: CC BY-NC-SA license

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