Low voltage high-SNR pipeline data converters

Abstract

design strategy is presented for obtaining high-SNR (14 bits or higher) in a low voltage pipeline data converter. This is accomplished with the removal of the S/H input stage and the use of a rail-to-rail input stage. The rail-to-rail input requires a reference calibration scheme to maintain converter linearity, and is implemented as a radix calibration.

Original document

The different versions of the original document can be found in:

• http://eecs.oregonstate.edu/~moon/research/files/newcas04_adc.pdf

• http://xplorestaging.ieee.org/ielx5/9395/29808/01359077.pdf?arnumber=1359077,

http://dx.doi.org/10.1109/newcas.2004.1359077

• https://web.engr.oregonstate.edu/~moon/research/files/newcas04_adc.pdf,

https://eecs.oregonstate.edu/~moon/research/files/newcas04_adc.pdf,

https://academic.microsoft.com/#/detail/2140925868