Abstract

Energy consumption has long been recognized as an important performance metric for many real-time and embedded systems. The traditional approach to energy-aware computing is to dynamically scale the voltage: this results in a significant drop in the energy consumed at the cost of a slowdown of the computation. In this paper, we explore a complementary approach to energy-aware real-time computing: that of runtime architecture configuration. As embedded real-time systems become ever more complex, the processors used will no longer be the bare-bones pipelines traditionally used, but rather high-end processors capable of meeting the timing needs of increasingly demanding applications. Also, the price of superscalar processors continues to fall, which allows them to be considered even for relatively cost-sensitive applications. Such high-end processors lend themselves to dynamic architecture adaptation. We describe how to exploit such adaptation and show that architecture adaptation when combined with dynamic voltage scaling, provides significant advantages over dynamic voltage scaling alone.


Original document

The different versions of the original document can be found in:

http://www.ecs.umass.edu/ece/realtime/publications/CPS/arch_adaptation.pdf,
https://dblp.uni-trier.de/db/conf/green/green2012.html#WangKK12,
http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000006322272,
https://academic.microsoft.com/#/detail/2009455298
http://dx.doi.org/10.1109/igcc.2012.6322272
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Published on 01/01/2013

Volume 2013, 2013
DOI: 10.1109/igcc.2012.6322272
Licence: CC BY-NC-SA license

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