Abstract

Based on the current state-of-the-art in avionics, the adoption of new networking technologies and their integration into complex systems requires important efforts to guarantee the respect of system level requirements. This sets a need for a more effective and systematic approach to validate new technological choices and their integration process. In this paper, we propose a hardware prototyping platform for validating the design of an avionic transducers network in an early development stage. The specific implementation reported in this paper targets two boards based on a Spartan-6 LX45T Xilinx FPGA. Both boards were configured to validate a custom transducers network architecture proposed by the authors. The resulting prototype is configured to maintain a throughput of at least 1 Mbit/s and to guarantee a deterministic traffic on the field bus to conform to actual avionic constraints. This paper covers the methodology involved in the design of our prototyping platform and highlights some of the advantages it offers.


Original document

The different versions of the original document can be found in:

http://dx.doi.org/10.1109/dasc.2013.6712548
http://dx.doi.org/10.1109/dasc.2013.6719625
https://ieeexplore.ieee.org/document/6712548,
https://academic.microsoft.com/#/detail/2056493108


DOIS: 10.1109/dasc.2013.6719625 10.1109/dasc.2013.6712548

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Published on 01/01/2014

Volume 2014, 2014
DOI: 10.1109/dasc.2013.6719625
Licence: CC BY-NC-SA license

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