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Pipeline morphing is a simple but effective technique for reconfiguring pipelined FPGA designs at run time. By overlapping computation and reconfiguration, the latency associated with emptying and refilling a pipeline can be avoided. We show how morphing can be applied to linear and mesh pipelines at both word-level and bit-level, and explain how this method can be implemented using Xilinx 6200 FPGAs. We also present an approach using morphing to map a large virtual pipeline onto a small physical pipeline, and the trade-offs involved are discussed. | Pipeline morphing is a simple but effective technique for reconfiguring pipelined FPGA designs at run time. By overlapping computation and reconfiguration, the latency associated with emptying and refilling a pipeline can be avoided. We show how morphing can be applied to linear and mesh pipelines at both word-level and bit-level, and explain how this method can be implemented using Xilinx 6200 FPGAs. We also present an approach using morphing to map a large virtual pipeline onto a small physical pipeline, and the trade-offs involved are discussed. | ||
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* [http://www.ee.ic.ac.uk/pcheung/publications/fpl97a.pdf http://www.ee.ic.ac.uk/pcheung/publications/fpl97a.pdf] | * [http://www.ee.ic.ac.uk/pcheung/publications/fpl97a.pdf http://www.ee.ic.ac.uk/pcheung/publications/fpl97a.pdf] | ||
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| + | * [http://link.springer.com/content/pdf/10.1007/3-540-63465-7_216 http://link.springer.com/content/pdf/10.1007/3-540-63465-7_216], | ||
| + | : [http://dx.doi.org/10.1007/3-540-63465-7_216 http://dx.doi.org/10.1007/3-540-63465-7_216] | ||
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| + | * [http://www.ee.ic.ac.uk/pcheung/publications/fpl97a.pdf http://www.ee.ic.ac.uk/pcheung/publications/fpl97a.pdf], | ||
| + | : [https://link.springer.com/chapter/10.1007/3-540-63465-7_216 https://link.springer.com/chapter/10.1007/3-540-63465-7_216], | ||
| + | : [https://core.ac.uk/display/22944989 https://core.ac.uk/display/22944989], | ||
| + | : [https://www.scipedia.com/public/Luk_et_al_2010a https://www.scipedia.com/public/Luk_et_al_2010a], | ||
| + | : [https://dblp.uni-trier.de/db/conf/fpl/fpl1997.html#LukSGC97 https://dblp.uni-trier.de/db/conf/fpl/fpl1997.html#LukSGC97], | ||
| + | : [https://dl.acm.org/citation.cfm?id=738886 https://dl.acm.org/citation.cfm?id=738886], | ||
| + | : [https://rd.springer.com/chapter/10.1007/3-540-63465-7_216 https://rd.springer.com/chapter/10.1007/3-540-63465-7_216], | ||
| + | : [https://academic.microsoft.com/#/detail/1725586073 https://academic.microsoft.com/#/detail/1725586073] | ||
Latest revision as of 17:20, 21 January 2021
Abstract
Pipeline morphing is a simple but effective technique for reconfiguring pipelined FPGA designs at run time. By overlapping computation and reconfiguration, the latency associated with emptying and refilling a pipeline can be avoided. We show how morphing can be applied to linear and mesh pipelines at both word-level and bit-level, and explain how this method can be implemented using Xilinx 6200 FPGAs. We also present an approach using morphing to map a large virtual pipeline onto a small physical pipeline, and the trade-offs involved are discussed.
Original document
The different versions of the original document can be found in:
- https://link.springer.com/chapter/10.1007/3-540-63465-7_216,
- https://core.ac.uk/display/22944989,
- https://www.scipedia.com/public/Luk_et_al_2010a,
- https://dblp.uni-trier.de/db/conf/fpl/fpl1997.html#LukSGC97,
- https://dl.acm.org/citation.cfm?id=738886,
- https://rd.springer.com/chapter/10.1007/3-540-63465-7_216,
- https://academic.microsoft.com/#/detail/1725586073
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Document information
Published on 01/01/2010
Volume 2010, 2010
DOI: 10.1007/3-540-63465-7_216
Licence: CC BY-NC-SA license
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