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== Abstract ==
 
== Abstract ==
  
To guarantee timeliness in hard real-time systems the knowledge of the worst-case execution time (WCET) for its time-critical tasks is mandatory. Accurate and correct WCET analysis for modern processor is a quite complex problem. Path analysis is required to identify a minimal set of possible execution paths. Further, the modeling of a processor’s internal states for features like caches or pipelines requires to consider possible interferences of these features.
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To guarantee timeliness in hard real-time systems the knowledge of the worst-case execution time (WCET) for its time-critical tasks is mandatory. Accurate and correct WCET analysis for modern processor is a quite complex problem. Path analysis is required to identify a minimal set of possible execution paths. Further, the modeling of a processor’s internal states for features like caches or pipelines requires to consider possible interferences of these features.
 
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Document type: Part of book or chapter of book
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== Full document ==
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<pdf>Media:Draft_Content_724737792-beopen271-5469-document.pdf</pdf>
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* [http://uhra.herts.ac.uk/bitstream/2299/16675/2/paper.pdf http://uhra.herts.ac.uk/bitstream/2299/16675/2/paper.pdf]
 
* [http://uhra.herts.ac.uk/bitstream/2299/16675/2/paper.pdf http://uhra.herts.ac.uk/bitstream/2299/16675/2/paper.pdf]
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* [http://link.springer.com/content/pdf/10.1007/978-3-540-45212-6_13 http://link.springer.com/content/pdf/10.1007/978-3-540-45212-6_13],
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: [http://dx.doi.org/10.1007/978-3-540-45212-6_13 http://dx.doi.org/10.1007/978-3-540-45212-6_13]
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* [https://link.springer.com/chapter/10.1007/978-3-540-45212-6_13 https://link.springer.com/chapter/10.1007/978-3-540-45212-6_13],
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: [https://uhra.herts.ac.uk/handle/2299/16675 https://uhra.herts.ac.uk/handle/2299/16675],
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: [https://www.scipedia.com/public/Fauster_et_al_2010a https://www.scipedia.com/public/Fauster_et_al_2010a],
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: [https://dblp.uni-trier.de/db/conf/emsoft/emsoft2003.html#FausterKP03 https://dblp.uni-trier.de/db/conf/emsoft/emsoft2003.html#FausterKP03],
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: [https://rd.springer.com/chapter/10.1007%2F978-3-540-45212-6_13 https://rd.springer.com/chapter/10.1007%2F978-3-540-45212-6_13],
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: [https://academic.microsoft.com/#/detail/1560403949 https://academic.microsoft.com/#/detail/1560403949]

Latest revision as of 16:31, 21 January 2021

Abstract

To guarantee timeliness in hard real-time systems the knowledge of the worst-case execution time (WCET) for its time-critical tasks is mandatory. Accurate and correct WCET analysis for modern processor is a quite complex problem. Path analysis is required to identify a minimal set of possible execution paths. Further, the modeling of a processor’s internal states for features like caches or pipelines requires to consider possible interferences of these features.


Original document

The different versions of the original document can be found in:

http://dx.doi.org/10.1007/978-3-540-45212-6_13
https://uhra.herts.ac.uk/handle/2299/16675,
https://www.scipedia.com/public/Fauster_et_al_2010a,
https://dblp.uni-trier.de/db/conf/emsoft/emsoft2003.html#FausterKP03,
https://rd.springer.com/chapter/10.1007%2F978-3-540-45212-6_13,
https://academic.microsoft.com/#/detail/1560403949
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Document information

Published on 01/01/2010

Volume 2010, 2010
DOI: 10.1007/978-3-540-45212-6_13
Licence: CC BY-NC-SA license

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