Abstract

ISBN : 978-1-4244-2182-4; International audience; This paper introduces a new methodology for optimizing the performance of Asynchronous-Linear Pipelines. The method supports all delay types, static and variable time delays, enabling the designers to optimize their architecture taking into account the timing information of data dependencies, circuit structure and process variations. The method not only determines the minimum degree of pipelining necessary to satisfy a given performance target, but also computes the optimum placement of the pipeline stages to maximize the throughput.

Abstract

International audience; This paper introduces a new methodology for evaluating the performance of asynchronous linear-pipelines. The Token Vector Delay Model is introduced to capture delay variability, which can originate from data, process and/or environment. Then, closed form equations modeling handshaking protocols are defined. These equations enable us to construct an abstract analytical model of the pipeline. The analytical model is then solved to compute the circuit performance in the presence of time variable delays. The tool developed to implement the method enables the designer to analyze circuits with tens of pipeline stages in a few seconds.

Abstract

International audience; This paper introduces a new methodology for determining the minimum number of registers needed to pipeline a linear asynchronous pipeline so that the final cycle time meets some constraints. Moreover, the methodology defines the optimum placing for the registers; ends with an optimally pipelined circuit.