Scipediacontent: Scipediacontent moved page Draft Content 317365918 to Schuster et al 2006a

2021-02-03T18:44:07Z

Scipediacontent moved page Draft Content 317365918 to Schuster et al 2006a

Scipediacontent: Created page with " == Abstract == This paper presents the design of a FPGA-based hardware co-processor, based on the SPHINX 3 speech recognition engine from CMU; capable of performing acoustic..."

2021-02-03T18:44:03Z

Created page with " == Abstract == This paper presents the design of a FPGA-based hardware co-processor, based on the SPHINX 3 speech recognition engine from CMU; capable of performing acoustic..."

New page

== Abstract ==

This paper presents the design of a FPGA-based hardware co-processor, based on the SPHINX 3 speech recognition engine from CMU; capable of performing acoustic modeling (AM) for medium sized vocabularies in real-time. By creating an input-driven pipeline for performing the calculations, we were able to maximize the throughput of the system while simultaneously minimizing the number of pipeline stalls. Use advanced placement techniques enabled post place-and-route speeds even greater than those necessary for real-time operation while operating at maximum workload. Further, by using input control vectors all FSMs were removed from the design, greatly increasing the flexibility of the design. These results combined with the ability to reprogram the system for different recognition tasks serve to create a system capable of in a vast array of environments. Synthesis to both Xilinx Virtex 4 and Spartan 3 FPGAs helps to further characterize the flexibility of the architecture.

== Original document ==

The different versions of the original document can be found in:

* [http://www.cecs.uci.edu/~papers/ipdps06/pdfs/51-RAW-PAPER-1.pdf http://www.cecs.uci.edu/~papers/ipdps06/pdfs/51-RAW-PAPER-1.pdf]

* [http://xplorestaging.ieee.org/ielx5/10917/34366/01639473.pdf?arnumber=1639473 http://xplorestaging.ieee.org/ielx5/10917/34366/01639473.pdf?arnumber=1639473],
: [http://dx.doi.org/10.1109/ipdps.2006.1639473 http://dx.doi.org/10.1109/ipdps.2006.1639473]

* [https://dblp.uni-trier.de/db/conf/ipps/ipdps2006.html#SchusterGH06 https://dblp.uni-trier.de/db/conf/ipps/ipdps2006.html#SchusterGH06],
: [http://www.cecs.uci.edu/~papers/ipdps06/pdfs/51-RAW-PAPER-1.pdf http://www.cecs.uci.edu/~papers/ipdps06/pdfs/51-RAW-PAPER-1.pdf],
: [http://dx.doi.org/10.1109/IPDPS.2006.1639473 http://dx.doi.org/10.1109/IPDPS.2006.1639473],
: [https://dl.acm.org/citation.cfm?id=1898699.1898700 https://dl.acm.org/citation.cfm?id=1898699.1898700],
: [https://academic.microsoft.com/#/detail/2155035955 https://academic.microsoft.com/#/detail/2155035955]

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Schuster et al 2006a - Revision history

Scipediacontent: Scipediacontent moved page Draft Content 317365918 to Schuster et al 2006a

Scipediacontent: Created page with " == Abstract == This paper presents the design of a FPGA-based hardware co-processor, based on the SPHINX 3 speech recognition engine from CMU; capable of performing acoustic..."