Scipediacontent: Scipediacontent moved page Draft Content 869424668 to Mishra et al 2009a

2021-01-28T17:33:18Z

Scipediacontent moved page Draft Content 869424668 to Mishra et al 2009a

Scipediacontent: Created page with " == Abstract == Functional validation of a processor design through execution of a suite of test programs is common industrial practice. In this paper, we develop a high-leve..."

2021-01-28T17:33:15Z

Created page with " == Abstract == Functional validation of a processor design through execution of a suite of test programs is common industrial practice. In this paper, we develop a high-leve..."

New page

== Abstract ==

Functional validation of a processor design through execution of a suite of test programs is common industrial practice. In this paper, we develop a high-level architectural specification driven methodology for systematic test-suite generation. Our primary contribution is an automated test-suite generation methodology that covers all possible processor pipeline interactions. To accomplish this automation, we (1) develop a fully formal processor model based on communicating extended finite state machines, and (2) traverse the processor model for on-the-fly generation of short test programs covering all reachable states and transitions. Our test generation method achieves several orders of magnitude reduction in test-suite size compared to the previously proposed formal approaches for test generation, leading to drastic reduction in validation effort.

== Original document ==

The different versions of the original document can be found in:

* [http://www.comp.nus.edu.sg/~tulika/DAC09-nga.pdf http://www.comp.nus.edu.sg/~tulika/DAC09-nga.pdf]

* [https://www.comp.nus.edu.sg/~abhik/pdf/dac09-testing.pdf https://www.comp.nus.edu.sg/~abhik/pdf/dac09-testing.pdf],
: [https://dblp.uni-trier.de/db/conf/dac/dac2009.html#DangRMM09 https://dblp.uni-trier.de/db/conf/dac/dac2009.html#DangRMM09],
: [https://esl.cise.ufl.edu/Publications/dac09.pdf https://esl.cise.ufl.edu/Publications/dac09.pdf],
: [http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000005227183 http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000005227183],
: [https://core.ac.uk/display/48666993 https://core.ac.uk/display/48666993],
: [https://dl.acm.org/citation.cfm?doid=1629911.1629953 https://dl.acm.org/citation.cfm?doid=1629911.1629953],
: [http://www.comp.nus.edu.sg/~abhik/pdf/dac09-testing.pdf http://www.comp.nus.edu.sg/~abhik/pdf/dac09-testing.pdf],
: [http://www.comp.nus.edu.sg/~tulika/DAC09-nga.pdf http://www.comp.nus.edu.sg/~tulika/DAC09-nga.pdf],
: [http://esl.cise.ufl.edu/Publications/dac09.pdf http://esl.cise.ufl.edu/Publications/dac09.pdf],
: [https://academic.microsoft.com/#/detail/2106340343 https://academic.microsoft.com/#/detail/2106340343]

* [http://dl.acm.org/ft_gateway.cfm?id=1629953&ftid=677728&dwn=1 http://dl.acm.org/ft_gateway.cfm?id=1629953&ftid=677728&dwn=1],
: [http://dx.doi.org/10.1145/1629911.1629953 http://dx.doi.org/10.1145/1629911.1629953]

* [ ]

← Older revision	Revision as of 17:33, 28 January 2021
(No difference)

Mishra et al 2009a - Revision history

Scipediacontent: Scipediacontent moved page Draft Content 869424668 to Mishra et al 2009a

Scipediacontent: Created page with " == Abstract == Functional validation of a processor design through execution of a suite of test programs is common industrial practice. In this paper, we develop a high-leve..."