Scipediacontent: Scipediacontent moved page Draft Content 421277688 to Kugel et al 2006a

2021-02-03T17:13:34Z

Scipediacontent moved page Draft Content 421277688 to Kugel et al 2006a

Scipediacontent: Created page with " == Abstract == In the last years, FPGAs became capable of performing complex floating-point based calculations. For many applications, highly parallel calculation units can..."

2021-02-03T17:13:31Z

Created page with " == Abstract == In the last years, FPGAs became capable of performing complex floating-point based calculations. For many applications, highly parallel calculation units can..."

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== Abstract ==

In the last years, FPGAs became capable of performing complex floating-point based calculations. For many applications, highly parallel calculation units can be implemented which deliver a better performance than general-purpose processors. This paper focuses on applications where the calculations can be done in a pipeline, as it is often the case for simulations. A framework for rapid design of such calculation pipelines is described. The central part is a Perl based code generator, which automatically assembles floating-point operators into synthesizable hardware description code where the generator is directed by a pipeline description file. The framework is supplemented by various floating-point operators and support modules, which allow generating ready-to-use pipelines. The code generator dramatically reduces development time and produces high-quality results. The performance of the framework is demonstrated by the implementation of pipelines for gravitational forces and hydrodynamics.

== Original document ==

The different versions of the original document can be found in:

* [http://www.cecs.uci.edu/~papers/ipdps06/pdfs/039-RAW-paper-1.pdf http://www.cecs.uci.edu/~papers/ipdps06/pdfs/039-RAW-paper-1.pdf]

* [http://xplorestaging.ieee.org/ielx5/10917/34366/01639439.pdf?arnumber=1639439 http://xplorestaging.ieee.org/ielx5/10917/34366/01639439.pdf?arnumber=1639439],
: [http://dx.doi.org/10.1109/ipdps.2006.1639439 http://dx.doi.org/10.1109/ipdps.2006.1639439]

* [https://dblp.uni-trier.de/db/conf/ipps/ipdps2006.html#LienhartKM06 https://dblp.uni-trier.de/db/conf/ipps/ipdps2006.html#LienhartKM06],
: [http://www.cecs.uci.edu/~papers/ipdps06/pdfs/039-RAW-paper-1.pdf http://www.cecs.uci.edu/~papers/ipdps06/pdfs/039-RAW-paper-1.pdf],
: [http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000001639439 http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000001639439],
: [https://dl.acm.org/citation.cfm?id=1899135 https://dl.acm.org/citation.cfm?id=1899135],
: [https://academic.microsoft.com/#/detail/2110398560 https://academic.microsoft.com/#/detail/2110398560]

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Kugel et al 2006a - Revision history

Scipediacontent: Scipediacontent moved page Draft Content 421277688 to Kugel et al 2006a

Scipediacontent: Created page with " == Abstract == In the last years, FPGAs became capable of performing complex floating-point based calculations. For many applications, highly parallel calculation units can..."