<?xml version="1.0"?>
<feed xmlns="http://www.w3.org/2005/Atom" xml:lang="en">
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		<title>Alves et al 2018a - Revision history</title>
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		<updated>2026-04-30T19:59:15Z</updated>
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		<generator>MediaWiki 1.27.0-wmf.10</generator>

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		<id>https://www.scipedia.com/wd/index.php?title=Alves_et_al_2018a&amp;diff=198017&amp;oldid=prev</id>
		<title>Scipediacontent: Scipediacontent moved page Draft Content 492596229 to Alves et al 2018a</title>
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				<updated>2021-02-01T21:01:23Z</updated>
		
		<summary type="html">&lt;p&gt;Scipediacontent moved page &lt;a href=&quot;/public/Draft_Content_492596229&quot; class=&quot;mw-redirect&quot; title=&quot;Draft Content 492596229&quot;&gt;Draft Content 492596229&lt;/a&gt; to &lt;a href=&quot;/public/Alves_et_al_2018a&quot; title=&quot;Alves et al 2018a&quot;&gt;Alves et al 2018a&lt;/a&gt;&lt;/p&gt;
&lt;table class=&quot;diff diff-contentalign-left&quot; data-mw=&quot;interface&quot;&gt;
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				&lt;td colspan='1' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;← Older revision&lt;/td&gt;
				&lt;td colspan='1' style=&quot;background-color: white; color:black; text-align: center;&quot;&gt;Revision as of 21:01, 1 February 2021&lt;/td&gt;
				&lt;/tr&gt;&lt;tr&gt;&lt;td colspan='2' style='text-align: center;' lang='en'&gt;&lt;div class=&quot;mw-diff-empty&quot;&gt;(No difference)&lt;/div&gt;
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		<author><name>Scipediacontent</name></author>	</entry>

	<entry>
		<id>https://www.scipedia.com/wd/index.php?title=Alves_et_al_2018a&amp;diff=198016&amp;oldid=prev</id>
		<title>Scipediacontent: Created page with &quot; == Abstract ==  The recent Hybrid Memory Cube (HMC) is a smart memory which includes functional units inside one logic layer of the 3D stacked memory design. In order to exec...&quot;</title>
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				<updated>2021-02-01T21:01:16Z</updated>
		
		<summary type="html">&lt;p&gt;Created page with &amp;quot; == Abstract ==  The recent Hybrid Memory Cube (HMC) is a smart memory which includes functional units inside one logic layer of the 3D stacked memory design. In order to exec...&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;&lt;br /&gt;
== Abstract ==&lt;br /&gt;
&lt;br /&gt;
The recent Hybrid Memory Cube (HMC) is a smart memory which includes functional units inside one logic layer of the 3D stacked memory design. In order to execute instructions inside the Hybrid Memory Cube (HMC), the processor needs to send instructions to be executed near data, keeping most of the pipeline complexity inside the processor. Thus, control-flow and data-flow dependencies are all managed inside the processor, in such way that only update instructions are supported by the HMC. In order to solve data-flow dependencies inside the memory, previous work proposed HMC Instruction Vector Extensions (HIVE), which embeds a high number of functional units with a interlock register bank. In this work we propose HMC Instruction Prediction Extensions (HIPE), that supports predicated execution inside the memory, in order to transform control-flow dependencies into data-flow dependencies. Our mechanism focus on removing the high latency iteration between the processor and the smart memory during the execution of branches that depends on data processed inside the memory. In this paper we evaluate a balanced design of HIVE comparing to x86 and HMC executions. After we show the HIPE mechanism results when executing a database workload, which is a strong candidate to use smart memories. We show interesting trade-offs of performance when comparing our mechanism to previous work.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Original document ==&lt;br /&gt;
&lt;br /&gt;
The different versions of the original document can be found in:&lt;br /&gt;
&lt;br /&gt;
* [https://ir.cwi.nl/pub/27796 https://ir.cwi.nl/pub/27796]&lt;br /&gt;
&lt;br /&gt;
* [https://ir.cwi.nl/pub/27796/tome2018.pdf https://ir.cwi.nl/pub/27796/tome2018.pdf]&lt;br /&gt;
&lt;br /&gt;
* [http://xplorestaging.ieee.org/ielx7/8337149/8341968/08342015.pdf?arnumber=8342015 http://xplorestaging.ieee.org/ielx7/8337149/8341968/08342015.pdf?arnumber=8342015],&lt;br /&gt;
: [http://dx.doi.org/10.23919/date.2018.8342015 http://dx.doi.org/10.23919/date.2018.8342015]&lt;br /&gt;
&lt;br /&gt;
* [https://dblp.uni-trier.de/db/conf/date/date2018.html#TomeSCAA18 https://dblp.uni-trier.de/db/conf/date/date2018.html#TomeSCAA18],&lt;br /&gt;
: [https://www.narcis.nl/publication/RecordID/oai%3Acwi.nl%3A27796 https://www.narcis.nl/publication/RecordID/oai%3Acwi.nl%3A27796],&lt;br /&gt;
: [https://ir.cwi.nl/pub/27796 https://ir.cwi.nl/pub/27796],&lt;br /&gt;
: [https://ir.cwi.nl/pub/27796/tome2018.pdf https://ir.cwi.nl/pub/27796/tome2018.pdf],&lt;br /&gt;
: [https://core.ac.uk/display/159254592 https://core.ac.uk/display/159254592],&lt;br /&gt;
: [https://academic.microsoft.com/#/detail/2798641962 https://academic.microsoft.com/#/detail/2798641962]&lt;br /&gt;
&lt;br /&gt;
* [https://ir.cwi.nl/pub/27796 https://ir.cwi.nl/pub/27796],&lt;br /&gt;
: [http://dx.doi.org/10.23919/date.2018.8342015 http://dx.doi.org/10.23919/date.2018.8342015]&lt;/div&gt;</summary>
		<author><name>Scipediacontent</name></author>	</entry>

	</feed>